1. Field of the Invention
The present invention relates generally to digital computers and, more particularly, to systems for concurrently copying the same, identical data from a master hard disk to a plurality of copy hard disks.
2. Description of the Prior Art
Companies which assemble personal computer systems, laptop and notebook computer systems, computer workstation systems, file server systems, etc. often include in such systems a hard disk onto which has been recorded various data. The data recorded onto the hard disk may include computer programs, device driver programs, instruction materials and/or manuals, system configuration data, and/or other data. While various alternative techniques exist for recording such programs and/or data onto hard disks, productivity considerations prevent mass assemblers of computer systems from loading programs and/or data onto the hard disks from conventional source media such as floppy disks and/or compact disk read-only-memory disks ("CD-ROMs"), or from a network file server. Consequently, computer system assemblers usually employ a multi-disk duplicating system that concurrently copies digital data from a master hard disk on which the data resides to a number of copy hard disks that are subsequently installed into computer systems.
Various techniques have been developed for increasing the speed at which digital data may be copied to magnetic recording media. U.S. Pat. No. 4,239,445 entitled "Method and Apparatus for Simultaneous Operation of Two IDE Disk Drives" uses unused wires in an Integrated Drive Electronics ("IDE") disk drive cable to carry additional control signals from a multi-disk adapter to two (2) IDE disk drives. The multi-disk adapter described in this patent uses the previously unused wires to rapidly access two (2) IDE drives in succession, and then allows both IDE disk drives to process commands and data simultaneously.
U.S. Pat. No. 4,375,655 entitled "Universal Digital Data Copying System" first describes a common technique for copying data fields without requiring mechanical synchronization of drive units. This first technique is to store the entire data field in a buffer memory, and then to serially write the data from the buffer memory onto a duplicate disk. An alternative, second common data copying technique also described in the patent electro-mechanically synchronizes rotation of copy drives with rotation of a master drive. While this second, synchronization technique omits the buffer memory, it requires using expensive, precision drives. Improving upon these two common techniques, this patent discloses using a phase locked oscillator ("PLO") and a fixed clock timing circuit in conjunction with a high-speed buffer memory for copying data. Digital data read from a master disk is used to establish an operating frequency for a tracking clock, preferable the PLO, which controls storage of data into the buffer memory. After some data is present in the buffer memory and a copy drive controller receives an index pulse from a slave drive, data is written from the buffer memory to the slave drive under the control of signals from the fixed clock timing circuit. A system disclosed in this patent couples together any number of drive units to permit concurrently making any number of duplicate copies from a single master copy.
FIG. 1 illustrates a conventional, prior art multi-disk duplicating system, such as those used by companies which assemble computer systems, that is referred to by the general reference character 20. As depicted in FIG. 1, the prior art multi-disk duplicating system 20 employs a conventional microprocessor based digital computer architecture. Thus, the multi-disk duplicating system 20 includes a microprocessor central processing unit ("CPU") 22 and a random access memory ("RAM") 24 that are interconnected by a system bus 26. Also connected to the system bus 26 is a system-bus interface 32 of a master input/output port 34. The master input/output port 34 also includes a master hard-disk interface 36 that is connected by a hard drive cable 38 to a master hard disk 42.
The prior art multi-disk duplicating system 20 also includes a plurality of copy I/O ports 52a-52d, each of which respectively includes a system-bus interface 54 that couples one of the copy I/O ports 52a-52d to the system bus 26. Similar to the master input/output port 34, each of the copy I/O ports 52a-52d also respectively includes a copy hard-disk interface 56, that is respectively connected by a hard drive cable 58 to a plurality of copy hard disks 62a-62d. As depicted in FIG. 1, the plurality of copy I/O ports 52a-52d equals in number the plurality of copy hard disks 62a-62d. The architecture of the multi-disk duplicating system 20 depicted in FIG. 1 may be used f or copying data between hard disks that are compatible with either the IDE/ATA standard, or with the Small Computer System Interface ("SCSI") standard.
The RAM 24 of the multi-disk duplicating system 20 stores both a disk-copy digital computer program that is executed by the microprocessor CPU 22, and, as will be explained in greater detail below, digital data that is copied from the master hard disk 42 to the copy hard disks 62a-62d. During normal operation of the multi-disk duplicating system 20, the microprocessor CPU 22 retrieves the digital computer program from the RAM 24, and then executes the digital computer program first for retrieving digital data digital data from the master hard disk 42 for storage into the RAM 24, and subsequently for writing the digital data from the RAM 24 sequentially to all the copy hard disks 62a-62d.
FIG. 2 is a timing diagram conceptually illustrating normal operation of the prior art multi-disk duplicating system 20 for copying digital data from the master hard disk 42 to each of the copy hard disks 62a-62d. In copying the digital data from the master hard disk 42 to the copy hard disks 62a-62d, the microprocessor CPU 22, executing the computer program, loops repetitively through a sequence of operations that are listed vertically downward along the left hand side of FIG. 2. Thus, the microprocessor CPU 22 first loops back to begin the sequence of operations. Then the microprocessor CPU 22 reads one word of data from the master hard disk 42 using the master input/output port 34 for storage into the RAM 24. The microprocessor CPU 22 then fetches the data from the RAM 24, and subsequently, using the respective copy I/O ports 52a-52d, the microprocessor CPU 22 causes that word of data to be sequentially written first to copy hard disk 62a, then to copy hard disk 62b, then to copy hard disk 62c, and finally to copy hard disk 62d.
In FIG. 2, each vertical line 68 indicates a single clock cycle of the microprocessor CPU 22. Thus, each looping operation of the microprocessor CPU 22 requires four (4) clock cycles. Each reading operation performed by the microprocessor CPU 22 requires nine (9) clock cycles. Storing the data from the microprocessor CPU 22 into the RAM 24 requires nine (9) clock cycles. Fetching the data from the RAM 24 also requires nine (9) clock cycles. Finally, writing the data to each of the copy hard disks 62a-62d requires nine (9) clock cycles. Thus, reading each word of data and writing that word of data to all four copy hard disks 62a-62d requires a total of sixty-seven (67) clock cycles. As illustrated in FIG. 2, in this way the prior art multi-disk duplicating system 20 accesses only one hard disk at a time, first the master hard disk 42 and then the copy hard disks 62a-62d one after the other. Accordingly, the microprocessor CPU 22 must interact with each hard drive individually one at a time, and the more hard drives connected to the multi-disk duplicating system 20, the slower its operation.
Using the architecture depicted in FIG. 1, copying data from the master hard disk 42 to four copy hard disks 62a-62d for 2.0 gigabyte ("G byte") hard disk drives requires approximately 142 minutes. Reducing the time required for copying that amount of data requires a microprocessor having a data transfer bandwidth much greater than the data bandwidth at which hard disk drives transmit or receive data. Microprocessors capable of providing such high performance are comparatively expensive. However, even such high performance microprocessors experience a performance degradation if the number of hard disk drives attached to the multi-disk duplicating system 20 were to increase from the four (4) depicted in FIG. 1 to eight (8) or sixteen (16). Moreover, increasing the performance of the multi-disk duplicating system 20 having the architecture depicted in FIG. 1 also requires using expensive, high speed memory for the RAM 24.